IEDM

Session 9: Power Devices SiC and GaN Vertical Power Devices

Monday, December 4
Imperial Ballroom A
Co-Chairs: Jun Suda, Nagoya University
Srabanti Chowdhury, UC Davis

1:35 PM
9.1 Body PiN diode inactivation with low on-resistance achieved by a 1.2 kV-class 4H-SiC SWITCH-MOS, Y. Kobayashi, N. Ohse, T. Morimoto*, M. Kato*, T. Kojima, M. Miyazato, M. Takei, H. Kimura and S. Harada*, Fuji Electric Co., Ltd., *National Institute of Advanced Industrial Science and Technology (AIST)

We have developed a novel SBD-integrated SiC-MOSFET with small cell pitch, called SWITCH-MOS, to solve body-PiN-diode-related problems known such as forward degradation and reverse recovery loss. The fabricated 1.2 kV SWITCH-MOS successfully inactivated the body-PiN-diode without degradation of on- and off-state characteristics as compared with conventional UMOS.

2:00 PM
9.2 1200 V GaN Vertical Fin Power Field-Effect Transistors, Y. Zhang, M. Sun, D. Piedra, J. Hu, Z. Liu*, Y. Lin, X. Gao**, K. Shepard*** and T. Palacios, Massachusetts Institute of Technology, *Singapore-MIT Alliance for Research and Technology, **RF LLC, ***Columbia University

We demonstrate record performance in a novel normally- off GaN vertical transistor with submicron fin-shaped channels. This transistor only needs n-GaN layers. An on-resistance of 0.2 mΩ·cm2, a breakdown voltage over 1200 V and currents up to 10 A have been demonstrated, rendering a figure of merit up to 7.2 GW/cm2.

2:25 PM
9.3 Determination of intrinsic phonon-limited mobility and carrier transport property extraction of 4H-SiC MOSFETs, M. Noguchi, M. Electric Corporation; T. Iwamatsu, H. Amishiro, H. Watanabe, K. Kita* and S.Yamakawa, Mitsubishi Electric Corporation, *The University of Tokyo

We determined the intrinsic phonon-limited mobility in the SiC MOSFET, for the first time. Based on this finding, the carrier transport properties of 4H-SiC MOSFETs were experimentally evaluated. The surface roughness scattering does not limit inversion layer mobility in high effective normal field, suggesting the modification of conventional mobility models.

2:50 PM Coffee Break

3:15 PM
9.4 Demonstrating >1.4 kV OG-FET performance with a novel double field-plated geometry and the successful scaling of large-area devices, D. Ji, Chirag Gupta*, S. H. Chan*, A. Agarwal*, W. Li, S. Keller*, U. K. Mishra* and S. Chowdhury, University of California, Davis, *University of California, Santa Barbara

A over 1.4 kV normally off (VTH = 4.7 V) vertical GaN OG-FET with a low specific on-state resistance of 2.2 milliohm-cm2 has been successfully demonstrated. The fabricated large- area transistor offered a breakdown voltage of 900 V and an on-state resistance of 4.1 ohm. The average channel electron mobility is 185 cm2/Vs.

3:40 PM
9.5 Progress and Future Challenges of SiC Power Devices and Process Technology (Invited), T. Kimoto, H. Niwa, N. Kaji, T. Kobayashi, Y. Zhao, S. Mori*, and M. Aketa*, Kyoto University, *ROHM Co., Ltd.

Recent progress in SiC device physics and development of power devices is reviewed. The authors determined the impact ionization coefficients in the wide temperature range, which enables accurate device simulation of SiC. 13 kV SiC pin diodes with an extremely low on-resistance and 11 kV SiC epitaxial MPS diodes are presented. MOS physics of SiC is also discussed and finally 3 kV reverse-blocking MOSFETs are demonstrated.

4:05 PM
9.6 High Voltage Vertical p-n Diodes with Ion-Implanted Edge Termination and Sputtered SiNx Passivation on GaN Substrates, J. Wang, L. Cao, J. Xie*, E. Beam*, R. McCarthy**, C. Youtsey** and P. Fay, University of Notre Dame, *Qorvo Inc., **MicroLink Devices Inc.

High-voltage vertical GaN-on-GaN diodes with Baliga figure of merit of 13.5 GW/cm2 are demonstrated in a simple implant-termination process flow. Measured breakdown voltage (Vbr) exceeding 1.2 kV, forward current above 8 kA/cm2, and Ron as low as 0.11 mΩcm2 are obtained. The devices do not require field plates or complex edge terminations to achieve material-limited performance.