Session 34: Focus Session - Optoelectronics, Displays and Imagers Silicon Photonics
Wednesday, December 6
Imperial Ballroom B
Co-Chairs: Zhiping Zhou, Peking University
Edoardo Charbon, EPFL
34.1 Advanced Silicon Photonics Technology Platform Leveraging a Semiconductor Supply Chain (Invited), P. De Dobbelaere, A. Dahl, A. Mekis, B. Chase, B. Weber, B. Welch, D. Foltz, G. Armijo, G. Masini, G. McGee, G. Wong, J. Balardeta, J. Dotson, J. Schramm, K. Hon, K. Khauv, K. Robertson, K. Stechschulte, K. Yokoyama, L. Planchon, L. Tullgren, M. Eker, M. Mack, M. Peterson, N. Rudnick, P. Milton, P. Sun, R. Bruck, R. Zhou, S. Denton, S. Fathpour, S. Gloeckner, S. Jackson, S. Pang, S. Sahni, S. Wang, S. Yu, T. Pinguet, Y. De Koninck, Y. Chi, Y. Liang, Luxtera Inc.
This paper covers a silicon photonics technology platform that leverages a commercial semiconductor supply chain for the manufacturing of high performance optical trans-ceivers for high performance computing and hyper-scale data-center applications.
34.2 Reliable 50Gb/s Silicon Photonics Platform for Next-Generation Data Center Optical Interconnects (Invited), P. Absil, K. Croes, A. Lesniewska, P. De Heyn, Y. Ban, B. Snyder, J. De Coster, F. Fodor, V. Simons, S. Balakrishnan, G. Lepage, N. Golshani, S. Lardenois, S.A. Srinivasan, H. Chen, W. Vanherle, R. Loo, R. Boufadil, M. Detalle, A. Miller, P. Verheyen, M. Pantouvaki and J. Van Campenhout, imec vzw
The next generations of data centers require a scalable optical transceiver technology. In this paper we present a silicon photonics platform supporting single-channel data rates of 50Gb/s and above. Advanced process options include 50GHz GeSi electro-absorption modulators, high efficiency thermo-optic phase shifters with Ppi
34.3 Developments in 300mm silicon photonics using traditional CMOS fabrication methods and materials (Invited), C. Baudot, M. Douix, S. Guerber, S. Crémer, N. Vulliet, J. Planchot, R. Blanc, L. Babaud, C. Alonso-Ramos*, D. Benedikovich*, D. Pérez-Galacho*, S. Messaoudène**, S. Kerdiles**, P. Acosta-Alba**, C. Euvrard-Colnat**, E. Cassan*, D. Marris-Morini*, L. Vivien*, and F. Boeuf, STMicroelectronics, *Université Paris Saclay, **Université Grenoble Alpes
Silicon photonics technological platforms are meant to generate derivative products and concurrently to benefit from the main advantages associated with CMOS platforms namely: high yield, system robustness, product reliability and large volume, low cost production. Nevertheless, a simultaneous innovative approach is to analogously take advantage from state-of-the-art fabrication methods and tools available in CMOS to develop new solutions and propose better performing devices to the platform.
34.4 Advanced devices and packaging of Si-photonics based optical transceiver for optical interconnection (Invited), K. Kurata, K. Yashiki, J. Fujikata, T. Horikawa, K. Kinoshita, J. Ushida, M. Tokushima, Y. Suzuki, D. Okamoto, S. Takahashi, A. Ukita, K. Takemura, Y. Ibusuki, T. Shimizu, M. Kurihara, Y. Hagihara, T. Mogami, and T. Nakamura Photonics Electronics Technology Research Association (PETRA)
High integration of photonics circuits and electronic circuits is expected in Si photonics technology. The small size of integrated photonics circuits is expected to lead to low costs and high-density optical interconnection. On the other hand, reduction in packaging costs will become vital toward lowering costs because of the demand for highly accurate assembly processes in optical coupling. Harmony between integrated devices and packaging design should be consider to realize miniature size and low cost transceiver. We propose advanced devices and Packaging of an Si-photonics-based optical transceiver for optical interconnection.
34.5 Femto-joule-per-bit integrated nanophotonics and challenge for optical computation (Invited), M. Notomi, K. Nozaki, A. Shinya, and M. Takiguchi, NTT Corporation
We review our recent achievements in various energy-efficient nanophotonic devices based on photonic crystals. Strong light confinement enables large enhancement of light-matter interactions and ultrasmall capacitance for OE/EO conversion devices. Owing to these two features, we have demonstrated that the energy consumption can be reduced down to fJ/bit or less, suggesting energy-efficient optical link in processor chips, and even opportunity for ultrasmall latency optoelectronic computations.