IEDM

Session 32: Process and Manufacturing Technology 3D Integration

Wednesday, December 6
Continental Ballroom 4
Co-Chairs: Bich-Yen Nguyen, Soitec
Mitsuhiro Togo, GLOBALFOUNDRIES

9:05 AM
32.1 The impact of Sequential-3D integration on semiconductor scaling roadmap, A. Mallik, A. Vandooren, L. Witters, A. Walke, J. Franco, Y. Sherazi, P. Weckx, D. Yakimets, M. Bardon, B. Parvais, P. Debacker, B. W. Ku*, S. K. Lim*, A. Mocuta, D. Mocuta, J. Ryckaert, N. Collaert, P. Raghavan, imec, *Georgia Institute of Technology, **Vrije Universiteit Brussel

The continued physical feature size scaling of CMOS transistors is experiencing asperities due to several factors (physical, technological, and economical), and it is expected to reach its boundary in the coming years. Sequential-3D (S3D) integration has been perceived as a promising alternative to continue the benefits offered by semiconductor scaling. This paper addresses the different variants of S3D integration and potential challenges to achieve a realizable solution. We analyze and quantify the benefits observed due to sequential scaling at a die level.

9:30 AM
32.2 High performance low temperature FinFET with DPSER, gate last and Self Aligned Contact for 3D sequential integration, J. Micout, V. Lapras, P. Batude, C. Fenouillet-Beranger, J. Lacord, B. Sklenard, B. Mathieu, Q. Rafhay*, V. Mazzocchi, J-P. Colinge, L. Lachal, X. Garros, M. Casse, A. Toffoli, G. Romano**, F. Allain, L. Brunet, J.-M. Hartmann, R. Bortolin, F. Mazen, S. Barraud, N. Rambal, C. Tabone, M-P. Samson**, P. Besombes, V. Delaye, Z. Saghi, V.Loup, C.Comboroure, V. Balan, L. Desvoivres, C. Vizioz, G. Ghibaudo*, and M. Vinet, CEA, LETI, MINATEC, *IMEP-LAHC, MINATEC, **ST Microelectronics

For the first time, a low temperature (LT) FinFET process is demonstrated, using Solid Phase Epitaxy Regrowth (SPER), gate last integration and Self Aligned Contact (SAC). The LT devices exhibit performances close to those of the High Temperature Process Of Reference (HT POR). Several techniques of SPER doping are investigated and an innovative Double SPER (DSPER) process using two amorphization/recrystallization steps, is demonstrated. This DSPER process has the advantage of doping the bulk of the S/D junctions. This work opens the door to the fabrication of high- performance LT FinFETs for 3D sequential integration.

9:55 AM
32.3 Material Innovation for MOL, BEOL, and 3D Integration (Invited), J. Koike, M. Hosseini, H. T. Hai, D. Ando, and Y. Sutou, Tohoku University

This paper presents new materials and processes for advanced technology node of Si semiconductor devices. For MOL, Co contact plug and amorphous Co-Ti barrier showed a good adhesion, limited growth of Co silicide, and a low contact resistivity of the order of 10-9 Ωcm2 on both n+ and p+ Si. For BEOL, a CVD-MnOx layer could be formed conformally in high-aspect ratio contact holes. The ALD-MnOx layer of 1.2 nm thick showed a good diffusion barrier property at 400 oC. For 3D integration, TSV of 10 μm diameter and 80 μm depth could be filled with low resistivity sintered Cu paste without voids.

10:20 AM
32.4 Scalable, sub 2µm Pitch, Cu/SiCN to Cu/SiCN Hybrid Wafer-to-Wafer Bonding Technology, E. Beyne, S.-W. Kim, L. Peng, N. Heylen, J. De Messemaeker, O. O. Okudur, A. Phommahaxay, T.-G. Kim, M. Stucchi, D. Velenis, A. Miller, and G. Beyer, imec

We present a novel approach to wafer-to-wafer hybrid bonding, using SiCN in combination with Cu pads of unequal size and surface topography, generated through novel CMP processing. Combining all three enabled a first-time demonstration of electrically yielding 300 mm-bonded wafers with pad pitches of 1.44 µm down to 0.72 µm.

10:45 AM
32.5 High efficiency direct liquid jet impingement cooling of high power devices using a 3D-shaped polymer cooler, T. Tiwei, H. Oprins, V. Cherman, G. Van der Plas, I. De Wolf, E. Beyne and M. Baelmans*, imec, *KU Leuven

A novel 3D-shaped polymer multi-jet impingement cooler based on low cost fabrication techniques is introduced for high performance applications. This paper presents the modeling study, design, fabrication, experimental characterization and benchmarking of this cooling concept, showing a very good thermal performance with low required pumping power.