IEDM

Magnetics Society events at IEDM 2017

Sponsored by the IEEE Magnetics Society

Two IEEE Magnetics Society events at IEDM 2017

With the rising interest of the microelectronics industry in STT-MRAM, it is very important to strengthen the relationship between the microelectronics and magnetism communities in order to accelerate the development of this new hybrid technology. For that, two special events related to MRAM technology are being organized around IEDM by the IEEE Magnetics Society.

1) A special poster session dedicated to MRAM on Tuesday from 2-5:30 pm, Yosemite Room

Various topics will be covered including MRAM materials, phenomena, technology, testing, hybrid CMOS/MTJ technology and circuits, spin-logic.  A similar MRAM poster session took place at IEDM 2016 and was very successful with 33 posters presented and very active cross-disciplinary discussions. This session is technically organized by the IEEE Magnetics Society. It appears as a special MRAM poster session scheduled on Tuesday afternoon 5 December 2017 in the IEDM program (http://ieee-iedm.org/program/). This event will be a great opportunity to bring together experts in magnetism and in microelectronics. This year, 35 posters were accepted for presentation. The list can be found on the IEEE Magnetics Society website (http://www.ieeemagnetics.org/).

Participants in this poster session need to register at IEDM as regular attendees. More information can be found at http://www.ieeemagnetics.org/

 

2) The 9th MRAM Global Innovation Forum (Hilton Union Square, Imperial Ballroom on the Ballroom level, 7 Dec 2017)

This is a one-day forum organized the day following IEDM (i.e on 7 December 2017, 8:45am – 5:30pm) in the same hotel as IEDM (Hilton Union Square, 333 O’Farrell St, San Francisco). The Forum will consist of 10 invited talks from leading experts and a panel discussion.  The program is indicated below. Various MRAM related topics will be covered including STT-MRAM technology, memory and processor demonstrations, spin orbit torque MRAM, and the needs, challenges and potential of MRAM. The Forum was originally initiated by Samsung Semiconductor, and this forum marks the 9th edition of the series.

The Forum is entirely sponsored by Samsung Semiconductor. The registration to the Forum is free of charge, including free lunch. However the number of attendees is limited. To register to the Forum, send an email to sandra.ingrassia@cea.fr with first name, last name, contact email, affiliation. A confirmation email will be sent to you. The deadline for is 3rd November 2017.

Program committee: Bernard Dieny (chair, SPINTEC, France), Bruce Terris (Western Digital, USA), Kyung Jin Lee (Korea Univ., South Korea), Hideo Ohno (Tohoku Univ., Japan), Daniel Worledge (IBM, USA).

 

9th MRAM Global Innovation Forum 2017

7 December 2017 , Hilton Union Square, Plaza Room, San Francisco

Program:

8:45 -9:00: Welcome and introduction (Bernard Dieny)

Session 1: STT-MRAM Technology (Chair Daniel Worledge, IBM)

9:00-9:30 Luc Thomas (TDK/Headway)

STT-MRAM for embedded memory applications from eNVM to Last Level Cache

9:30-10:00   Guohan Hu (IBM)

Low-Current Spin Transfer Torque MRAM with Double MTJs

10:00-10-30  Cheng-Ming Lin  (TSMC)

MRAM Technology Solution for Embedded Memory Applications

10-30 – 11:00 : Coffee break

Session 2: Memory demonstration and impact on processor performance (Chair: Bruce Terris, WD)

11:00 – 11:30 Seung Kang (Qualcomm)

MRAM and Its Derivative Devices for Secure Semiconductor Systems in the Era of Internet-of-Things

11:30 – 12 : 00 Dave Eggleston (Global Foundries)

eMRAM: The March to Manufacturing

12:00 – 12:30 Yong Kyu Lee (Samsung Foundry Business, Samsung Electronics Co.)

Highly Manufacturable STT-MRAM Embedded Technology based on 28nm FDSOI RF-Logic Process  

12-30 – 14:00 : Lunch break

Session 3: SOT-MRAM and VCMA (chair: Kyung Jin Lee, Korea Univ.)

14:00 – 14:30 Sunshuke Fukami (Tohoku Univ.)

Spin-orbit torque switching for ultralow-power VLSI and AI hardware

14:30 – 15:00 Hiroaki Yoda (Toshiba)

Voltage-Control Spintronics Memory having potentials for high-density and high-speed applications

Session 4: The needs (Automotive, IoT and AI) and potential/challenges ahead of MRAM (chair: Bernard Dieny)

15:00 – 15:30 Tetsuo Endoh (Tohoku)

Embedded Nonvolatile Memory with STT-MRAMs and its Application for Nonvolatile Brain-Inspired VLSIs

15:30 – 16:00 Thomas Jew (NXP)

Embedding MRAM in Automotive and IoT Microcontroller Solutions

 16:00 – 16:30 Coffee break

16: 30 -17:30 Panel discussion:

PCRAM, ReRAM, MRAM: competing or complementary technologies?

Moderator: Daniel Worledge (IBM)

Panelists: Gabriele Navarro (CEA/LETI), Seung Kang (QUALCOMM), Thomas Jew (NXP), Tetsuo Endoh (Tohoku University), Chris Petti (Sandisk/WD)

Bernard DIENY and Bruce TERRIS
IEEE Magnetics Society

14:00 – 14:30 S. Fukami (Tohoku Univ.)

Spin-orbit torque switching for ultralow-power VLSI and AI hardware

14:30 – 15:00 H.Yoda (Toshiba)

Voltage-Control Spintronics Memory having potentials for high-density and high-speed applications

The needs (Automotive, IoT and AI) and potential/challenges ahead of MRAM

15:00 – 15:30 Tetsuo Endoh (Tohoku)

Embedded Nonvolatile Memory with STT-MRAMs and its Application for Nonvolatile Brain-Inspired VLSIs

15:30 – 16:00 Thomas Jew (NXP)

Embedding MRAM in Automotive and IoT Microcontroller Solutions

 16:00 – 16:30 Coffee break

16: 30 -17:30 Panel discussion:

PCRAM, ReRAM, MRAM: competing or complementary technologies?

Moderator: Daniel Worledge (IBM)

Panelists: Gabriele Navarro (CEA/LETI), Seung Kang (QUALCOMM), Thomas Jew (NXP), Tetsuo Endoh (Tohoku University), Christ Petti (Sandisk/WD)

Bernard DIENY and Bruce TERRIS
IEEE Magnetics Society