Session 7: Modeling and Simulation Advanced Numerical and Compact Models
Monday, December 5, 1:30 p.m.
Continental Ballroom 7-9
Co-Chairs: Denis Rideau, STMicroelectronics
Xing Zhou, Nanyang Technological University
7.1 A Novel Synthesis of Rent’s Rule and Effective-Media Theory Predicts FEOL and BEOL Reliability of Self-Heated ICs, W. Ahn, H. Jiang, S.H. Shin and M. Alam, Purdue University
Precise specification of local temperature, T(x,y,z), in ICs with self-heated surround-gate transistors (SG-FET) is essential to predict transistor and interconnect reliability, especially for Arrhenius-activated degradation modes, such as NBTI, HCI, electromigration, etc. One may calculate T(x,y,z) by 3D Finite element modeling (FEM), but the complex back end of line (BEOL) structure, with 8~10 layers of multiple-connected percolating interconnects, makes this approach impractical for pre-Silicon design/optimization or fast turn-around reliability modeling. In this context, a physics-based, predictive effective media theory (EMT) for BEOL will transform the reliability modeling of self-heated SG-FET technologies. Therefore, in this paper, we (i) develop a physics based electro-thermal compact model for ICs (including the BEOL), based on an innovative synthesis of Rent’s rule, EMT for ellipsoidal inclusion, and thermal image charge theory; (ii) validate the model by comparing against 3D FEM results and experimental data from the industry, and (iii) predict BEOL reliability (i.e., electromigration at the specific metal level) and front end of line (FEOL) reliability (i.e., NBTI, HCI) based on the temperature profile. Since the model anticipates changes in T(x,y,z) with interconnect layout and geometry (e.g., wire length and number distribution, metal volumetric fraction, thermal resistance, etc.), our physics-based model suggests exciting opportunities for reliability-aware optimization of self-heated IC.
7.2 New Approach for Understanding “Random Device Physics” from Channel Percolation Perspectives: Statistical Simulations, Key Factors and Experimental Results, Z. Zhang, Z. Zhang, R. Wang, X. Jiang, S. Guo, Y. Wang, X. Wang*, B. Cheng*, A. Asenov* and R. Huang, Peking University, *Synopsys
The concept of percolative channel is essential for understanding statistical variability and reliability in nanoscale transistors. In this paper, the quantitative factors of channel current percolation path (PP) are comprehensively studied in planar and FinFET devices for the first time, with statistical simulations and experimental characterizations. The properly-defined PP parameters are well quantified by the proposed new approach, and extracted from ‘atomistic’ device simulation. The experimental data of random telegraph noise (RTN) is used via the atomic PP model to characterize the underlying channel local current fluctuations and thus to benchmark the PP in reality. Experimental results of extracted PP parameters are consistent with those predicted from simulations, confirming the effectiveness of the proposed approach. The 3D PP in FinFET has different features compared with 2D PP in planar devices, and exhibits additional distortion along Fin-width direction. This work provides a unique framework for deep understanding of “random device physics” and thus is helpful for future nano-device design.
7.3 Oxide-Based Analog Synapse: Physical Modeling, Experimental Characterization, and Optimization, B. Gao, H. Wu, J. Kang*, H, Yu**, H. Qian, Tsinghua University, *Peking University, **Southern University of Science and Technology
Analog switching in oxide synaptic device has been recently proposed as an important technology for realizing hardware neural network with online training ability. This paper develops a new physical model to quantify the analog weight modulation behaviors in the oxide-based analog synapse. The analog SET, RESET, and retention loss processes are simulated and verified by the experimental data measured from the fabricated HfOx based synapse. Based on the simulation results, key material parameters are captured, and optimization guidelines are provided.
7.4 Extending the Bounds of Performance in E-mode p-channel GaN MOSHFETs, A. Kumar and M. De Souza, The University of Sheffield
An investigation of the distribution of the electric field within a normally-off p-channel heterostructure field-effect transistor in GaN, explains why a high |V_th | requires a reduction of the thickness of oxide and the GaN channel layer. The trade-off between on-current |I_ON | and |V_th |, responsible for the poor |I_ON | in E-mode devices is overcome with an additional cap AlGaN layer that modulates the electric field in itself and the oxide. A record |I_ON | of 50-60 mA/mm is achieved with a |V_th | greater than |-2| V in the designed E-mode p-channel MOSHFET, which is more than double that in a conventional device.
7.5 NSP: Physical Compact Model for Stacked-planar and Vertical Gate-All-Around MOSFETs, O. Rozeau, S. Martinie, T. Poiroux, F. Triozon, S. Barraud, J. Lacord, Y.-M. Niquet*, C. Tabone, R. Coquand, E. Augendre, M. Vinet, O. Faynot, and J.-C. Barbé, CEA-Leti, *CEA-INAC
In this work, a predictive and physical compact model for NanoWire/NanoSheet (NW/NS) Gate-All- Around (GAA) MOSFET is presented. Based on a novel methodology for the calculation of the surface potential including quantum confinement, this model is able to handle arbitrary NW/NS cross-section shape of stacked-planar and vertical GAA MOSFETs (circular, square, rectangular). This Nanowire Surface Potential (NSP) based model, validated both by numerical simulations and experimental data, is demonstrated to be very accurate in all operation regimes of GAA MOSFETs.
7.6 A Physics-Based Compact Model for Material- and Operation-Oriented Switching Behaviors of CBRAM, Y. Zhao, J. Hu, P. Huang, F. Yuan*, Y. Chai*, X. Liu and J. Kang, Peking University, *The Hong Kong Polytechnic University
A physics-based compact model is developed to capture the essential resistive switching behaviors of CBRAM under DC and AC operations. Three types of evolution modes of conductive filament correlated with material properties and operation schemes are modeled based on the experimental observations. By modeling the temperature and electric-field effects as well as the electrical conduction, the model can well reproduce the DC and AC switching characteristics in different material stacks and operation modes.
7.7 Multi-Domain Compact Modeling for GeSbTe-based Memory and Selector Devices and Simulation for Large-scale 3-D Cross-Point Memory Arrays, N. Xu, J. Wang, Y. Deng, Y. Lu, B. Fu, W. Choi, U. Monga*, J. Jeon*, J. Kim*, K.-H. Lee* and E. S. Jung*, Samsung Semiconductor Inc., *Samsung Electronics
A novel compact model is developed by coupling comprehensive physical equations from electrical, thermal and phase-transition domains in order to capture their correlations exist in GeSeTe (GST)-based device physics. Several non-ideal effects during GST memory cell operations have been studied with particular focus on cell Read/Write margins and reliability issues. Finally, large-scale 3-D cross- point memory array circuits have been simulated with developed physics-based models to further explore the design constraints.